The Open Compute Project Foundation is proud to formally announce a new leadership team for the High Performance Computing (HPC) Project. The Foundation is extremely grateful for all of our volunteer leadership who give of their time and talents to help drive the OCP community.
HPC Incubation Committee Representative
Philip Pokorny is Chief Technical Officer for Penguin Computing and responsible for all aspects of its hardware products. After joining the company in February, 2001 as an engineer, he has steadily taken on more responsibilities. He brings a wealth of both customer and engineering experience to the design, development and support of Penguin Computing products.
Since the beginning of the Open Compute organization, Penguin Computing has been involved and Philip has developed multiple products and accessories to make the Open Compute Open Rack products appeal to a wider range of enterprise customers in addition to the core group of OCP founding companies. These are all available from Penguin Computing under the "Tundra" trademark but are completely Open Rack compatible and inter-operable.
Prior to Penguin Computing, he spent 14 years in various engineering and system administration roles with Cummins, Inc. and Cummins Electronics. At Cummins, Pokorny participated in the development of internal network standards, deployed and managed a multisite network of multiprotocol routers and supported a diverse mix of office and engineering workers with a variety of server and desktop operating systems.
He has contributed code to Open Source projects, including the Linux kernel, lm_sensors and LCDproc.
Philip graduated in 1987 from Rose-Hulman Institute of Technology with BS degrees in Math and Electrical Engineering, and a second major in Computer Science.
|Adi Gangidi is a Senior Systems Design Engineer at Rackspace, leading the Barreleye G2 program, an Open Compute and OpenPOWER initiative. He helps Rackspace build and scale, the next generation, cost-effective, Barreleye / Zaius Servers , featuring IBM POWER 8/9 processors. He is excited about the efficiency these servers bring to data-center in a post-moore's law era. He does whatever it takes for these initiatives to get into production: From low level hardware engineering to building high-level cost models for the program. In past, he has worked with variety of FPGAs, GPUs, embedded hardware and HPC applications in various roles. He received his MSEE from University of Massachusetts and his BSEE from BITS Pilani. When not working, he loves spending time with his wife, critiquing movies and visiting national parks.
Steven Roberts is a Senior Technical Staff member with IBM charged with HPC / Cognitive system design and delivery. He is passionate about solving complex challenges with the belief that this requires harnessing compute hardware innovations into a heterogeneous frameworks to unencumber scientific advancement.
Steve has led building block integration and cluster triage teams for IBM's CORAL program and has been involved with HPC hardware or software projects since his Master Degree in Compute Science at the University of Texas in 2002.