Join us for a free tutorial session at the upcoming Chiplet Summit in Santa Clara, February 6, from 1:00PM - 5:00PM.
Building the Open Chiplet Economy - Chapter II
Chiplets have rapidly become the accepted way to develop chips, at leading-edge nodes, and eventually everywhere (AI, HPC, Edge, Automotive, etc.) there are chips, there will be Chiplets. For designers at smaller and large companies to get the most out of this approach which allows drop-in additions, an open chiplet economy is necessary.
The Open Compute Project (OCP) has taken the lead in creating that economy, with its Open Domain Specific Project (ODSA) since 2019, and formal launch of the "Open Chiplet Economy" vision in January 2023. Remarkable progress has occurred since the launch, with real products available from over a dozen companies leveraging the (1) standardizations for describing Chiplets using an XML schema (now a Global JEDEC standard) and die-to-die interfaces and (2) reference tools and best practices white papers developed and placed in the open by the OCP ODSA Project.
Chapter II for the Open Chiplet Economy is focused on reducing the friction in developing chiplet-based products by developing and promoting standard Chiplet form factors that can span several generations of process nodes and products, developing open and rapid chiplet product development supply chains and marketplace that reduce risk for companies dipping their toes in the water with Chiplet based products for niche markets with lower volumes. Join this tutorial to get up to speed on all the activities and successes taking place in building the Open Chiplet Economy and participate in the discussion on how to move forward on Chapter II.
Part 1 - Introduction : Bapi Vinnakota, Open Domain Specific Project (ODSA) Lead, OCP, "Progress in the Emerging Chiplet Economy"
Part 2 - Tools for the Open Chiplet Economy
Part 3 - Open Chiplet Economy for AI & Edge
Part 4 - Standardizing Chiplet Platforms
Part 5 - Breaking Down Barriers to Chiplets (Panel Session)
OCP will also be giving a keynote presentation, and will be at Booth 107, where we will be featuring an Experience Center with product demos featuring the following:
UCLA - Cost Modeling for 2.5D and 3D Systems
Purdue - Real-Time Precision Prediction of 3-D Package Thermal Maps via Image-to-Image Translation
Fermi National Accelerator Laboratory
- Near Sensor data processing chiplets
- Cryogenic chiplets for SNSPD or quantum
- 3D chiplets
LBL DOE - Demonstrator Board for HPC Accelerator Chiplets
There is a need for a common prototyping platform for demonstrating new advanced packaging designs. The cost of delivering a prototype doesn't stop with just the package design - you also must have a flexible carrier and board design that enables rapid bring-up of prototype demonstrations of new technologies such as the chiplets. LBNL has developed an open and reusable board design that has the additional instrumentation for bring-up of advanced prototypes that can be shared with other interested organizations to facilitate demonstrations of new chiplets and advanced packaging technologies.
If you have not registered yet for the Chiplet Summit full event, you will be able to do so at no cost!
If you have any questions, or would like to arrange a meeting with the OCP team, contact email@example.com.