OCP Sponsored Chiplet Summit Tutorial - Building the Chiplet Economy

On Tuesday, February 6, 2024, the Open Compute Project's Cliff Grossner, Chief Innovation Officer and Bapi VinnakotaEngineer, Lawrence Berkeley Laboratory; Head Open Domain-Specific Architecture Project (ODSA) held a sponsored tutotrial at the Chiplet Summit in Santa Clara, CA; Building the Chiplet Economy.

Chiplets have rapidly become the accepted way to develop chips at leading-edge nodes. In theory, they allow designers to drop known-good dies into their designs wherever needed. However, in practice, designers must have a way to quickly find what they want in a form they can use. A new chiplet economy is thus necessary. The Open Compute Project (OCP) has taken the lead in creating that economy. It started by supporting the Open Domain Specific Project (ODSA) in 2019, and it launched the "open chiplet economy" vision in 2023.

The vision is quickly becoming reality. Its initial focus was on simplifying the definition of chiplet-based products by providing:

  1. Business and technical workflows needed to assemble a chiplet-based product
  2. Standards for creating IP for die-to-die interfaces
  3. Reference tools for specifying, building, interfacing, inserting, and testing chiplets

Remarkable progress has occurred since the launch. OCP and JEDEC have used an XML-based schema (developed by OCP) to create the JEP 30 standard. It allows EDA tools from multiple vendors to handle chiplets. Recently, 11 organizations showed real products and prototypes based on the standard. This puts the industry well on the way to defining interoperable chiplets that designers can easily use in applications.

Current work emphasizes making chiplet-based products easier to develop and market. The community is creating standard form factors, developing supply chains, and creating an easily accessed marketplace. The idea is to help smaller or peripheral companies create chiplets for AI, IoT, HPC, financial, industrial and process control, and mil/aero markets that have low volumes. We also plan to join with marketing, sales, and business development specialists to identify what is needed to make chiplets financially viable.

Presentation:

Part 1 - Introduction

Part 2 - Tools for the Open Chiplet Economy

Part 3 - Open Chiplet Economy for AI and Edge

Part 4 - Standardizing Chiplet Platforms

Panel: Making the Open Chiplet Economy Grow

Moderator:

  • Dharmesh Jani, Infrastructure Ecosystem and Partnership Lead, Meta

Panelists:

  • Elad Alon, CEO, Blue Cheetah Analog Design
  • Keith Nellis, Product Management & Marketing, d-Matrix
  • Tom Hackenberg, Principal Analyst, Yole
  • Letizia Giuliano, Vice President Product Marketing and Management, Alphawave Semi
  • Kevin Yee, Sr. Director of IP & Ecosystem Marketing, Samsung

About the Organizers/Moderator:

Cliff Grossner is Chief Innovation Officer at OCP where he leads its market intelligence and drives new programs including guiding inventors in developing early-stage company ideas, setting strategic direction and building awareness of OCP, establishing new alliances, and launching new activities. Before joining OCP, he headed the Cloud and Data Research Practice at Informa Tech, where he worked on cloud services, data center compute and networking, and data center infrastructure. He previously held senior positions at Alcatel-Lucent, Bell Labs, and Nortel. He earned his PhD at McGill University (Canada) and holds over 10 patents in networking and telecommunications.

Bapi Vinnakota leads the Open Domain-Specific Architecture (ODSA) sub-project within the Open Compute Project (OCP). At OCP, he works on the open chiplet economy, including the Bunch of Wires (BoW) die-to-die interconnect. He previously was an engineering manager at Broadcom, Netronome, and Intel. He is a long-time leader in open communities. He has several publications on ODSA and BoW, including an invited talk at the ACM/IEEE International Workshop on System-Level Interconnect Pathfinding (SLIP), presentations at Hot Interconnects, and an article in IEEE Micro. He earned a PhD in computer engineering from Princeton University.