Open Chiplet Economy

The Open Chiplet Economy Sub-Project, under the OCP Server Project, brings the modularization trend that reshaped data center hardware to the foundations of computing. As high-performance and domain-specific SoCs grow larger and costlier, chiplets offer a disaggregated, modular alternative using advanced 2D and 3D system-in-package engineering. The Sub-Project, together with its area of the OCP Marketplace, is where the OCP Community applies open collaboration and standardization across the scope of chiplets. Its upstream work covers the EDA tools and flows for chiplet-based design, the collateral and economics of building a SiP from chiplets, and the interfaces that connect chiplets, with workstreams in each area producing specs, white papers and methodologies.

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Steering Committee Representative

Gregory D Sellman

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About This Sub-Project

Just as a strategy of modularization has impacted data center hardware at large, from design to operations, so too is this trend coming to the foundations of computing. High-performance and domain-specific system-on-chip (SoC) compute architectures have grown larger and more expensive to produce, and chiplets are the disaggregated, modular equivalent, with new advanced 2D and 3D system-in-package (SiP) engineering. This Open Chiplet Economy OCP Sub-Project and the corresponding area of the OCP Marketplace are where the OCP Community applies open collaboration and standardization across the scope of chiplets.

Scope

The Open Chiplet Economy Sub-Project is where the upstream work happens in the Community. It deals with multiple aspects of building a selection of chiplets into a SiP. The main aspects of this work are:

EDA tools and flows : the Electronic Design Automation tools and flows needed to enable chiplet-based design workflows.
Collateral and economics : the collateral needed to build a SiP consisting of chiplets, with a business component that looks at the economics of chiplets and how that changes the marketplace.
Interfaces : the interfaces that connect chiplets together.

Work Areas

Each of the scope categories has a number of workstreams working collaboratively to develop coherent specs, white papers, methodologies, etc. for an open chiplet market to thrive.

Economy Booster
Business	Chiplet Workstream	HPC Modularity	PoC

Chiplet Design Tools
CDX-3DK	CDX-Flow

Open Interfaces
BoW	Phy Metrics	D2D Test	Link Layer

OCP Academy

Ramp up with the OCP Academy eLearning courses.

Open Chiplet Economy eLearning on OCP Academy

Resources

Charter

Intro to Open Chiplet Economy (formerly known as ODSA) – ODSA/Open Chiplet Economy Open Accelerator Architecture

Open Domain-Specific Accelerators / Open Chiplet Economy: What Are They & Why Should They Matter?

Active documents

Type	Description	Version	Submit Date	Contributors	License	Notes
Video Series	Why Chiplets, Architectures, Packaging, D2D interfaces, Testability, Cost, Interoperability, Marketplace, Call to Action	1.0	2025	Microchip, Analog Devices, Intel, NXP, Cadence, Entrepreneur, Ampora, Blue Cheetah, Yorchip	Creative Commons	10 mins x 9 sections
Training Series	Why Chiplets, Architectures, Packaging, D2D interfaces, Testability, Cost, Interoperability, Marketplace, What’s Next	1.0	2025	Microchip, Analog Devices, Intel, NXP, Cadence, Entrepreneur, Ampora, Blue Cheetah, Yorchip	OCP Academy	10 mins x 9 sections
White Paper	DEVELOPING AN OPEN CHIPLETS MARKETPLACE: CHALLENGES AND OPPORTUNITIES	1.0	2/23/2022	Microchip, IBM, Meta, JCET, ARM, Samsung, Google, Teradyne	Creative Commons License
Introduction	odsa_ocp_intro.pdf	n/a	2/27/19	Netronome	n/a	Presented in 2/27 Server WG call.
White Paper (Draft)	Bunch of Wires Interface Proposal	Rev 0.7	10/26/19	Authors: Mark Kuemerle, Ramin Farjad, Bapi Vinnakota	OCP CRLA
White Paper (Released)	Developing an Open Chiplets Marketplace: Challenges and Opportunities	n/a	2022	Authors: ARM, Google, IBM, JCET, Meta, Microchip, Samsung Electronics, Teradyne	Creative Commons License

Recordings from Past Calls

Open Chiplet Economy calls (YouTube playlist)
Bunch of Wires (BoW) workstream calls (YouTube playlist)
Bunch of Wires (BoW) workstream calls (earlier) (YouTube playlist)

Call Calendar

These meeting are recorded via audio and video. By participating you consent that these recordings may be made publicly available. Any presentation materials, proposals and meeting minutes are published on the respective project’s wiki page and are open to the public in accordance to OCP’s Bylaws and IP Policy. This can be found at http://www.opencompute.org/about/ocp-policies/. If you have any questions please contact OCP.

Open Chiplet Economy calendar

Sub-Projects

3DIC Assembly Design Kits standardization

3DIC Assembly Design Kits Standardization is a workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. Details about the workstream's mission, scope, and ways to get involved will be added in the near future.

3DIC Material Design Kits standardization

3DIC Material Design Kits Standardization is a Workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. This workstream focuses on 3DIC Material Design Kits standardization. Details about the workstream’s mission, scope, and ways to get involved will be added in the near future.

AH3C NAPMP Chiplet Ecosystem

AH3C NAPMP Chiplet Ecosystem is a workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. Details about the workstream's mission, scope, and ways to get involved will be added in the near future.

Bunch of Wires

Bunch of Wires is a Workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. This workstream focuses on the Bunch of Wires (BoW) open-source, easy-to-port inter-chiplet (die-to-die) interface specification. Details about the workstream’s mission, scope, and ways to get involved will be added in the near future.

Bunch of Wires Test Chip

Bunch of Wires Test Chip is a workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. Details about the workstream's mission, scope, and ways to get involved will be added in the near future.

Chiplet / SiP Test

Chiplet / SiP Test is a workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. Details about the workstream's mission, scope, and ways to get involved will be added in the near future.

Chiplet Design Exchange

Chiplet Design Exchange is a Workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. This workstream focuses on the open chiplet physical description format (CDX). Details about the workstream’s mission, scope, and ways to get involved will be added in the near future.

Chiplet Systems

Chiplet Systems is a Workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project, focused on multi-vendor chiplet interoperability: making it practical to build a system-in-package from chiplets sourced from different vendors. It addresses the system-level challenges of integrating interoperable chiplets across five areas: silicon and systems architecture, security, power efficiency, performance optimization, and an interoperability checklist of tests and guidelines. The workstream builds on progress made by UCIe, Bunch of Wires, and other OCE groups, collaborating with them to define best practices and standards for seamless chiplet-based system design.

Foundation Chiplet System Architecture

Foundation Chiplet System Architecture is a Workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. This workstream focuses on the Foundation Chiplet System Architecture (FCSA). Details about the workstream’s mission, scope, and ways to get involved will be added in the near future.

Lightweight Serial Interconnect

Lightweight Serial Interconnect is a Workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. This workstream focuses on defining an open, lightweight framing approach for modular system connectivity. Details about the workstream’s mission, scope, and ways to get involved will be added in the near future.

Link Layer

Link Layer is a Workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. This workstream focuses on the die-to-die (D2D) Link Layer interface and its implementations. Details about the workstream’s mission, scope, and ways to get involved will be added in the near future.

Open Framework for Chiplet Eco-system Virtual Prototyping

Open Chiplet Economy (OCE) invites stakeholders from across the semiconductor industry – including chiplet, multi-die, IP, EDA, and hardware/software co-design organizations – from industry, research labs, and academia – to participate in shaping a vendor-neutral open framework to accelerate front-end of the System-in-Package design & development pipeline.

PHY FlexI

PHY FlexI is a workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. Details about the workstream's mission, scope, and ways to get involved will be added in the near future.

PHY Interface

PHY Interface is a Workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. This workstream focuses on the Bunch of Wires (BoW) open-source, easy-to-port inter-chiplet (die-to-die) interface specification. Details about the workstream’s mission, scope, and ways to get involved will be added in the near future.

Test Package PoC

Test Package PoC is a workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. This workstream focuses on a proof-of-concept product that integrates existing die from multiple companies into one package, for emerging AI/HPC applications. Details about the workstream's mission, scope, and ways to get involved will be added in the near future.