Lightweight Serial Interconnect

Lightweight Serial Interconnect is a Workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project. The Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets. This workstream focuses on defining an open, lightweight framing approach for modular system connectivity. Details about the workstream’s mission, scope, and ways to get involved will be added in the near future.

Call for Participation (CFP) Open Framework for Chiplet Eco-system Virtual Prototyping

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Steering Committee Representative

Gregory D Sellman

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About This Workstream

Workstream Leads: Allan Cantle

Lightweight Serial Interconnect is a Workstream under the Open Chiplet Economy (OCE) Sub-Project of the OCP Server Project.

The Open Chiplet Economy Sub-Project brings the modularization trend that reshaped data center hardware to the foundations of computing, applying open collaboration and standardization across the scope of chiplets.

This workstream focuses on defining an open, lightweight framing approach for modular system connectivity.

Details about the workstream’s mission and ways to get involved will be added in the near future.

Scope

This workstream focuses on defining an open, lightweight framing approach for modular system connectivity.

The full scope of this workstream will be added in the near future.

Resources

Introduction

The increasing diversity of AI workloads is driving demand for modular, power-efficient, domain-specific system architectures. Existing chiplet interconnect approaches are optimized for tightly coupled designs over <25mm channels, using high pin-count, low-speed parallel interfaces. This workstream targets a different part of the design space: a lightweight serial interconnect approach that defines an industry-standard Very Short-Reach (VSR) interconnect, enabling lower pin-count connectivity for more modular and flexible chiplet integration, including on-substrate and near-package pluggable configurations. The interconnect may be implemented as a standalone physical chiplet or integrated as IP within a host device. While this introduces a modest increase in energy per bit, it expands system design flexibility, enables new partitioning options, and supports improved yield, manufacturability, and serviceability.

Mission Statement

To enable an open, low-power, modular serial interconnect ecosystem that allows system builders to flexibly compose domain-specific architectures optimized for diverse and evolving AI workloads.

We will achieve this by advancing open, lightweight connectivity specifications that improve interoperability, composability, and system efficiency for chiplet-based and modular AI systems.

Goals

This workstream seeks to:

  1. Promote open interoperability Establish an open foundation for lightweight serial interconnect and framing approaches that can be adopted across a broad ecosystem of system and silicon providers.
  2. Enable modular system composition Support the flexible integration of chiplets, accelerators, memory, and other functional components into domain-specific systems tailored to target AI applications and deployment requirements.
  3. Improve efficiency and scalability Encourage approaches that reduce power, latency, complexity, and integration overhead while supporting scalable system design.
  4. Support domain-specific innovation Provide building blocks that allow system architects to create differentiated systems optimized for diverse AI models, data flows, and workload characteristics.
  5. Foster ecosystem collaboration Create a framework within OCP OCE for community review, refinement, and evolution of open specifications that can accelerate broader industry alignment.

Resources

Draft and release versions of the OmniConnect 1.0, supporting documents, and new content can be found on the workstreams Google Drive. The most recent deliverables are summarized below

Document Name URL Diff Status Publication Date
OmniConnect LSI Draft 0.8 LSI Draft 0.8   For Review 2026-08-07
         
         

Recordings from Past Calls

2026

– September 8th 2026 – Regular Meeting – Recording – August 11th 2026 – Regular Meeting – Minutes – Zoom Recording – June 23rd 2026 – Inaugural Meeting – Minutes – Zoom Recording – Workstream Introductary Presentation

Lightweight Serial Interconnect calendar