AI Native Edge MHS

AI Native Edge-MHS is a Sub-Project of the OCP AI Computing Continuum (AICC) Project. It specifies AI-optimized modular hardware for hyperscale-adjacent environments, defining standardized mechanical, electrical, and thermal interfaces so interoperable multi-node AI systems, servers, and racks can be built for scale-up, scale-out, scale-across, and wireless access architectures. Its specifications also set the technical requirements suppliers must meet for OCP recognition. Compute cores, GPUs, cooling, chassis, software, firmware, security, and environmental requirements are addressed by complementary MHS, design, or product specifications.

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Steering Committee Representative

Sean Varley

Project Leads

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About This Workstream

The AI Computing Continuum (AICC) defines an open, modular framework to accelerate the adoption of scalable, interoperable, and sustainable AI infrastructure beyond centralized hyperscale data centers. Within the AICC framework, AI Native Edge operates as a focused initiative addressing modular hardware building blocks targeting these hyperscale-adjacent environments.

By extending hyperscale data center innovations into real-world edge constraints around power, thermal capacity, physical footprint, connectivity, and serviceability, the AI Native Edge initiative enables repeatable, cost-effective deployment of advanced AI compute systems across the full AI Computing Continuum.

Scope

The AI Native Edge initiative specifies AI-optimized modular hardware solutions:

Standardized Interfaces — mechanical, electrical, and thermal interfaces that allow interoperable multi-node AI systems to be implemented in the targeted environments

Foundational Building Blocks — specifications for building AI-capable servers, racks, and systems supporting scale-up, scale-out, scale-across, and wireless access architectures, with portability and interchangeability across diverse deployments

OCP Recognition Requirements — the technical requirements suppliers must meet to achieve OCP recognition for compliant hardware implementations

Out of Scope — compute core and GPU components, thermal solutions, reliability design details, chassis systems, cooling infrastructure, software, firmware, security, and environmental requirements — addressed through complementary MHS, design, or product specifications

Resources

The parent project of this Subproject is the AI Computing Continuum.

This Project is open to the public and we want to welcome all those who would like to be involved.

Disclaimer: Please do not submit any confidential information to the Project Community. All presentation materials, proposals, meeting minutes and/or supporting documents are published by OCP and are open to the public in accordance to OCP’s Bylaws and IP Policy. This can be found on the OCP OCP Policies page. If you have any questions please contact OCP.

Vision & Mission

The AI Computing Continuum (AICC) defines an open, modular framework to accelerate the adoption of scalable, interoperable, and sustainable AI infrastructure beyond centralized hyperscale data centers. Within the AICC framework, AI Native Edge operates as a focused initiative addressing modular hardware building blocks targeting these hyperscale adjacent environments.

Documents

– Charter TBA

Specs and Designs

Link to the Specs and Designs page (none yet)

Regular Project Calls

This project meets weekly on Mondays at 8am PT. This call is open to the public (please check the call calendar).

– Call Calendar