proteanTecs provides monitoring solutions for chiplet-based designs, from production to the field. By applying machine learning to novel data created by on-chip monitors, the company provides deep data analytics and real-time applications across the entire lifecycle – increasing quality, performance, reliability, and power efficiency of advanced packages.
This solution covers monitoring of both chiplets and die-to-die interconnects:
Chiplet Monitoring includes chiplet outlier detection, parametric grading, and mix-and-match during production testing, and in-mission power/performance optimization and failure prevention in the field. This leads to better pre-assembly quality, improved yield and binning, and optimized SiP cost/performance.
D2D Interconnect Monitoring enables lane performance grading, interconnect outlier detection, in-mission interconnect health monitoring, and lane repair (on ATE and in the field). Together, these applications ensure accurate characterization, improved SiP post-assembly quality, and enhanced SiP reliability.
proteanTecs is a TSMC OIP®, SAMSUNG SAFE™ and an Intel IFS Accelerator IP Alliance member and a contributing member of the UCIe™ consortium.
