The scope of this document has several levels. The specification of the BoW interface includes these requirements:
- Operating modes
- Chip-to-chip wire signals
- Wire ordering
- Timing and electrical specifications on the chip-to-chip interface
- Signals at the logic (Link Layer) interface
- Configuration, initialization, calibration
- Functions that must be supported at the Link Layer or above
The specification includes recommendations for these elements:
- Bump patterns
- Arrangement of multiple slices in a link
- Arrangement of wires in laminate and advanced packaging
- Signal integrity of the wire channel
- Configuration and management programming
- Design for test and test methods
- Performance estimates
- Conformance verification
