As a follow-up to and building upon our past Open Systems for AI Workshops on the Data Center Physical Infrastructure work area, we continue to advance our understanding by exploring Data Center IT Infrastructure. This workshop will bring together various engineer and architect practitioners to share their knowledge and vision and allow for a melding of forward thinking in this space.
Within IT Infrastructure this workshop’s focus is AI Pod and Cluster Network Interconnects. Note that a follow-on workshop will also separately cover the photonics and optical side of such interconnects.
| Start | End | Title | Speakers |
|---|---|---|---|
| 8:00 | 8:10 | Welcome & Introduction | James Kelly (OCP) Ravindra Sunkad (Meta) Barak Gafni (NVIDIA) |
| 8:10 | 8:25 | UEC Overview [Slides] | J. Metz (AMD, UEC) |
| 8:25 | 8:40 | AI Designs and Interconnects [Slides] | Arihant Jain (Arista) |
| 8:40 | 8:55 | Role of Ethernet in the Next Generation AI System Architectures [Slides] | Susmita Joshi (Astera) |
| 8:55 | 9:10 | Performance Fine Tuning in Disaggregated Scheduled Fabric Network [Slides] | Gad Arnest (Broadcom) Nivin Lawrence (Meta) |
| 9:10 | 9:25 | Multi-Pathing in AI Ethernet Networks [Slides] | Hemal Shah (Broadcom) |
| 9:25 | 9:45 | A Framework for Programmable Congestion Control in Network Simulators [Slides] | Satananda Burla (Marvell) |
| 9:45 | 10:00 | BREAK | BREAK |
| 10:00 | 10:15 | Copper Interconnects in 200G Scale-Up Networks [Slides] | Raymond Law (LOTES) |
| 10:15 | 10:30 | Scale Up Ethernet (SUE) [Slides] | Ian Cox (Broadcom) |
| 10:30 | 10:45 | Ultra Accelerator Link – The Industry Standard Scale-Up Fabric [Slides] | Kurtis Bowman (AMD, UALink) |
| 10:45 | 11:00 | Observability and Resiliency in AI Networking: A look into NICs and DPUs [Slides] | Vladimir Chukov (NVIDIA) |