Editing TAP Instrumentation
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[[File:Screenshot_2020-07-01_16.35.12.png|right]] | [[File:Screenshot_2020-07-01_16.35.12.png|right]] | ||
==Instrumentation and Measurement - Workstream #6== | ==Instrumentation and Measurement - Workstream #6== | ||
[https://www.opencompute.org/wiki/Time_Appliance_Project | [https://www.opencompute.org/wiki/Time_Appliance_Project Time Appliances Project] | ||
==Objective== | ==Objective== | ||
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:- Lead: [mailto:anand.ram@calnexsol.com Anand Ram] (Calnex) | :- Lead: [mailto:anand.ram@calnexsol.com Anand Ram] (Calnex) | ||
:- Lead: [mailto:julianstj@fb.com Julian St James] (Meta) | :- Lead: [mailto:julianstj@fb.com Julian St James] (Meta) | ||
==Recording from Past Calls== | ==Recording from Past Calls== | ||
=Hardware Roadmap= | |||
Initial Proof of Concept based on Time Card for PPS measurement | |||
=Software= | |||
Integrate Time Card timestamping for data collection and export | |||
== | ==Potential Future Solutions== | ||
{| class="wikitable" | {| class="wikitable" | ||
|- | |- | ||
! | ! | ||
! | ! Core Hardware !! Objective !! Status | ||
|- | |- | ||
| '''#1''' | | '''#1''' | ||
| | | TDC | ||
| | | Small, cheap, and low power use-case | ||
|- | |- | ||
1. TDC based design, targeting small and cheap use-case. | |||
2. PTM based design, to synchronize multiple measurement daughter cards with a high stability source over PCIe | |||
3. UWB based design, targeting locations where GPS is not available at point of measurement | |||
4. DPLL based design, targeting non-FPGA use case | |||