| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| wtdog_controller|sys_rst_signal |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
| wtdog_controller|redge_pltrst |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| wtdog_controller |
17 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
| lpc_controller|lad_bus |
5 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
0 |
| lpc_controller |
28 |
13 |
0 |
13 |
12 |
13 |
13 |
13 |
4 |
0 |
0 |
0 |
0 |
| vr_hot_latch_module |
4 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| fivr_fault_latch_module |
4 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| pltrst_n_latch |
4 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| prochot_n_latch |
4 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| pchhot_n_latch |
4 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| thermtrip_n_latch |
4 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| caterr_n_latch |
4 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| error_n_2_latch |
4 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| error_n_1_latch |
4 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| error_n_0_latch |
4 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| latch_clear_slp3 |
4 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| latch_clear_slp4 |
4 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| latch_clear |
4 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|pvccin_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|p1v8_err_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|p3v3_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|p1v5_pch_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|p1v05_proc_io_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|p1v05_pch_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|p0v6_vtt_dimm_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|p1v2_vddq_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|p2v5_vpp_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|pvccscsus_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|pvccgbe_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|pvcckrhv_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|pvccioin_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|pvccscfusesus_err_2_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing|p3v3_stby_phy_err_latch |
5 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| bcv_vr_sequencing |
34 |
1 |
3 |
1 |
46 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| gen_clk_4hz |
2 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| gen_clk_1hz |
2 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| gen_clk_1khz |
2 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| ref_clk_gen |
2 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| cpld_osc|osc_altufm_osc_518_component |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cpld_osc |
1 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |