Timing Violation Report Min Delay Analysis

SmartTime Version v11.5
Microsemi Corporation - Microsemi Libero Software Release v11.5 (Version 11.5.0.26)
Date: Tue Feb 03 16:43:16 2015


Design: INTEL_RCC_FPGA_X100
Family: SmartFusion
Die: A2F200M3F
Package: 256 FBGA
Temperature: COM
Voltage: COM
Speed Grade: -1
Design State: Post-Layout
Data source: Silicon verified
Min Operating Condition: BEST
Max Operating Condition: WORST
Using Enhanced Min Delay Analysis
Scenario for Timing Analysis: Primary


No Path

