Synthesis Report
#Build: Synplify Pro (R) Q-2020.03L-SP1, Build 182R, Oct 29 2020
#install: E:\lattice 3.12\diamond\3.12\synpbase
#OS: Windows 8 6.2
#Hostname: HP-PC

# Mon May 24 11:28:55 2021

#Implementation: Denverton_COMe_CPLD


Copyright (C) 1994-2020 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: Q-2020.03L-SP1
Install: E:\lattice 3.12\diamond\3.12\synpbase
OS: Windows 6.2

Hostname: HP-PC

Implementation : Denverton_COMe_CPLD
Synopsys HDL Compiler, Version comp202003synp2, Build 182R, Built Oct 29 2020 10:49:53, @

@N|Running in 64-bit mode
###########################################################[

Copyright (C) 1994-2020 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: Q-2020.03L-SP1
Install: E:\lattice 3.12\diamond\3.12\synpbase
OS: Windows 6.2

Hostname: HP-PC

Implementation : Denverton_COMe_CPLD
Synopsys Verilog Compiler, Version comp202003synp2, Build 182R, Built Oct 29 2020 10:49:53, @

@N|Running in 64-bit mode
@I::"E:\lattice 3.12\diamond\3.12\synpbase\lib\lucent\machxo2.v" (library work)
@I::"E:\lattice 3.12\diamond\3.12\synpbase\lib\lucent\pmi_def.v" (library work)
@I::"E:\lattice 3.12\diamond\3.12\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__)
@I::"E:\lattice 3.12\diamond\3.12\synpbase\lib\vlog\umr_capim.v" (library snps_haps)
@I::"E:\lattice 3.12\diamond\3.12\synpbase\lib\vlog\scemi_objects.v" (library snps_haps)
@I::"E:\lattice 3.12\diamond\3.12\synpbase\lib\vlog\scemi_pipes.svh" (library snps_haps)
@I::"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\cfg_int_gen.v" (library work)
@I::"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v" (library work)
@N: CG334 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":15:13:15:25|Read directive translate_off.
@N: CG333 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":17:13:17:24|Read directive translate_on.
@I::"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\LPC_IO_CYCLE.v" (library work)
@I::"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v" (library work)
@N: CG334 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":15:13:15:25|Read directive translate_off.
@N: CG333 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":17:13:17:24|Read directive translate_on.
@I::"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\Wd_Ctrl_Mod.v" (library work)
Verilog syntax check successful!

Compiler output is up to date.  No re-compile necessary

Selecting top level module COME_CPLD_TOP
@N: CG364 :"E:\lattice 3.12\diamond\3.12\synpbase\lib\lucent\machxo2.v":1793:7:1793:10|Synthesizing module OSCH in library work.
Running optimization stage 1 on OSCH .......
@N: CG364 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\LPC_IO_CYCLE.v":2:7:2:18|Synthesizing module LPC_IO_CYCLE in library work.

	IO_RANGE_LOW=12'b101000011110
	IO_RANGE_HIGH=12'b101000011111
	IDLE=6'b000001
	START=6'b000010
	CTDIR=6'b000100
	ADDR=6'b001000
	RDATA=6'b010000
	WDATA=6'b100000
	MEM_RD=4'b0100
	MEM_WR=4'b0110
	IO_RD=4'b0000
	IO_WR=4'b0010
   Generated name = LPC_IO_CYCLE_Z1
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\LPC_IO_CYCLE.v":78:35:78:49|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\LPC_IO_CYCLE.v":95:35:95:49|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\LPC_IO_CYCLE.v":112:36:112:51|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\LPC_IO_CYCLE.v":129:28:129:35|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\LPC_IO_CYCLE.v":210:29:210:37|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\LPC_IO_CYCLE.v":326:18:326:25|Removing redundant assignment.
Running optimization stage 1 on LPC_IO_CYCLE_Z1 .......
@N: CG364 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":20:7:20:15|Synthesizing module power_seq in library work.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":288:25:288:37|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":363:26:363:39|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":430:30:430:43|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":431:30:431:41|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":432:30:432:44|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":433:30:433:43|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":434:30:434:44|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":435:30:435:41|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":436:30:436:44|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":437:30:437:42|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":438:30:438:43|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":439:30:439:40|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":805:28:805:36|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":806:28:806:39|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":807:28:807:37|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":808:28:808:36|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":809:28:809:38|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":810:28:810:39|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":811:28:811:39|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":812:28:812:38|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":813:28:813:38|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":814:28:814:43|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":815:28:815:37|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":831:28:831:43|Removing redundant assignment.
@W: CG133 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":118:17:118:35|Object seq_power_cycle_cnt is declared but not assigned. Either assign a value or remove the declaration.
@W: CG133 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":136:16:136:23|Object TEST_CNT is declared but not assigned. Either assign a value or remove the declaration.
@W: CG133 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":387:14:387:31|Object s_xp1r05v_vccio_pg is declared but not assigned. Either assign a value or remove the declaration.
Running optimization stage 1 on power_seq .......
@W: CL169 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":819:0:819:5|Pruning unused register seq_power_cnt_t2[9:0]. Make sure that there are no unused intermediate registers.
@W: CL169 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":397:0:397:5|Pruning unused register s_vddqp_pgood[2:0]. Make sure that there are no unused intermediate registers.
@W: CL169 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":397:0:397:5|Pruning unused register s_xp0r6v_pgood[2:0]. Make sure that there are no unused intermediate registers.
@W: CL169 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":397:0:397:5|Pruning unused register s_pwrgd_all. Make sure that there are no unused intermediate registers.
@A: CL282 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":144:0:144:5|Feedback mux created for signal i_pmu_slp_s45_n. It is possible a set/reset assignment for this is signal missing. To improve timing and area, specify a set/reset value.
@N: CG364 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\Wd_Ctrl_Mod.v":1:7:1:17|Synthesizing module Wd_Ctrl_Mod in library work.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\Wd_Ctrl_Mod.v":55:23:55:33|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\Wd_Ctrl_Mod.v":87:20:87:27|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\Wd_Ctrl_Mod.v":136:21:136:29|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\Wd_Ctrl_Mod.v":185:18:185:29|Removing redundant assignment.
Running optimization stage 1 on Wd_Ctrl_Mod .......
@N: CG364 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\cfg_int_gen.v":1:7:1:17|Synthesizing module cfg_int_gen in library work.

	DI_WIDTH=4'b0101
   Generated name = cfg_int_gen_5
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\cfg_int_gen.v":87:30:87:45|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\cfg_int_gen.v":102:29:102:44|Removing redundant assignment.
Running optimization stage 1 on cfg_int_gen_5 .......
@N: CG364 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":19:7:19:19|Synthesizing module COME_CPLD_TOP in library work.
@W: CG532 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":169:0:169:6|Within an initial block, only Verilog force statements and memory $readmemh/$readmemb initialization statements are recognized, and all other content is ignored. Simulation mismatch may occur
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":175:28:175:43|Removing redundant assignment.
@N: CG179 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":271:22:271:31|Removing redundant assignment.
Running optimization stage 1 on COME_CPLD_TOP .......
Running optimization stage 2 on COME_CPLD_TOP .......
@N: CL189 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":171:0:171:5|Register bit internal_por_cnt[5] is always 1.
@W: CL260 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":171:0:171:5|Pruning register bit 5 of internal_por_cnt[5:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level.
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":30:11:30:22|Input EXCD0_CPPE_N is unused.
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":31:11:31:23|Input EXCD0_PERST_N is unused.
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":32:11:32:22|Input EXCD1_CPPE_N is unused.
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":33:11:33:23|Input EXCD1_PERST_N is unused.
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":35:12:35:18|Input I2C_SCL is unused.
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":46:13:46:26|Input CPLD_PROCHOT_L is unused.
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":50:13:50:18|Input THRM_N is unused.
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":80:14:80:25|Input VCCP_PINALRT is unused.
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\COME_CPLD_TOP.v":81:14:81:26|Input VDDQP_PINALRT is unused.
Running optimization stage 2 on cfg_int_gen_5 .......
Running optimization stage 2 on Wd_Ctrl_Mod .......
@N: CL201 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\Wd_Ctrl_Mod.v":142:0:142:5|Trying to extract state machine for register s_current_sta.
Running optimization stage 2 on power_seq .......
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[19] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[20] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[21] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[22] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[23] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[24] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[25] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[26] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[27] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[28] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[29] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[30] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Optimizing register bit power_ok_CNT[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[19] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[20] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[21] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[22] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[23] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[24] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[25] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[26] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[27] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[28] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[29] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[30] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Optimizing register bit VCC_EN_CNT[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[19] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[20] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[21] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[22] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[23] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[24] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[25] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[26] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[27] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[28] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[29] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[30] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Optimizing register bit VCCRAM_CNT[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[19] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[20] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[21] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[22] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[23] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[24] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[25] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[26] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[27] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[28] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[29] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[30] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Optimizing register bit VCCREF_CNT[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[19] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[20] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[21] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[22] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[23] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[24] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[25] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[26] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[27] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[28] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[29] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[30] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Optimizing register bit VDDQ_N_CNT[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[19] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[20] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[21] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[22] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[23] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[24] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[25] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[26] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[27] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[28] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[29] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[30] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Optimizing register bit RSMRST_N_CNT[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[19] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[20] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[21] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[22] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[23] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[24] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[25] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[26] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[27] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[28] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[29] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[30] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Optimizing register bit V1P05_CNT[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":247:0:247:5|Optimizing register bit VNN_CNT[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: CL190 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":247:0:247:5|Optimizing register bit VNN_CNT[19] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.

Only the first 100 messages of id 'CL190' are reported. To see all messages use 'report_messages -log E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\synlog\Denverton_COMe_CPLD_Denverton_COMe_CPLD_compiler.srr -id CL190' in the Tcl shell. To see all messages in future runs, use the command 'message_override -limit {CL190} -count unlimited' in the Tcl shell.
@W: CL279 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":259:0:259:5|Pruning register bits 31 to 18 of V1P80_CNT[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
@W: CL279 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":247:0:247:5|Pruning register bits 31 to 18 of VNN_CNT[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
@W: CL279 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":235:0:235:5|Pruning register bits 31 to 18 of V1P05_CNT[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
@W: CL279 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":223:0:223:5|Pruning register bits 31 to 18 of RSMRST_N_CNT[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
@W: CL279 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":211:0:211:5|Pruning register bits 31 to 18 of VDDQ_N_CNT[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
@W: CL279 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":199:0:199:5|Pruning register bits 31 to 18 of VCCREF_CNT[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
@W: CL279 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":187:0:187:5|Pruning register bits 31 to 18 of VCCRAM_CNT[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
@W: CL279 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":175:0:175:5|Pruning register bits 31 to 18 of VCC_EN_CNT[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
@W: CL279 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":163:0:163:5|Pruning register bits 31 to 18 of power_ok_CNT[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
@N: CL201 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":444:0:444:5|Trying to extract state machine for register current_state.
Extracted state machine for register current_state
State machine has 28 reachable states with original encodings of:
   0000000000000
   0000000000001
   0000000000010
   0000000000011
   0000000000100
   0000000000101
   0000000000110
   0000000000111
   0000000001000
   0000000001001
   0000000001010
   0000000001011
   0000000001100
   0000000001111
   0000000010000
   0000000010001
   0000000010010
   0000000010011
   0000000010100
   0000000010101
   0000000010110
   0000000010111
   0000000011000
   0000000011001
   0000000011010
   0000000011011
   0000000011100
   0000000011101
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":40:17:40:27|Input vddqp_pgood is unused.
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":41:17:41:28|Input xp0r6v_pgood is unused.
@N: CL159 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\power_seq.v":47:17:47:26|Input i_wdt_loss is unused.
Running optimization stage 2 on LPC_IO_CYCLE_Z1 .......
@N: CL201 :"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\source\LPC_IO_CYCLE.v":134:4:134:9|Trying to extract state machine for register cur_state.
Extracted state machine for register cur_state
State machine has 6 reachable states with original encodings of:
   000001
   000010
   000100
   001000
   010000
   100000
Running optimization stage 2 on OSCH .......

For a summary of runtime and memory usage per design unit, please see file:
==========================================================
@L: E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\synwork\layer0.rt.csv


At c_ver Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 90MB peak: 91MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime

Process completed successfully.
# Mon May 24 11:28:55 2021

###########################################################]
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Copyright (C) 1994-2020 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: Q-2020.03L-SP1
Install: E:\lattice 3.12\diamond\3.12\synpbase
OS: Windows 6.2

Hostname: HP-PC

Implementation : Denverton_COMe_CPLD
Synopsys Synopsys Netlist Linker, Version comp202003synp2, Build 182R, Built Oct 29 2020 10:49:53, @

@N|Running in 64-bit mode

Linker output is up to date. No re-linking necessary


At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 87MB peak: 87MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime

Process completed successfully.
# Mon May 24 11:28:55 2021

###########################################################]

For a summary of runtime and memory usage for all design units, please see file:
==========================================================
@L: E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\synwork\Denverton_COMe_CPLD_Denverton_COMe_CPLD_comp.rt.csv

@END

At c_hdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 22MB peak: 22MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime

Process completed successfully.
# Mon May 24 11:28:55 2021

###########################################################]

@A: multi_srs_gen output is up to date. No run necessary.
To force a re-synthesis, select [Resynthesize All] in menu [Run].
Click link to view previous log file.
Multi-srs Generator Report
@R:"E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\synlog\Denverton_COMe_CPLD_Denverton_COMe_CPLD_multi_srs_gen.srr"
Premap Report

# Mon May 24 11:28:55 2021


Copyright (C) 1994-2020 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: Q-2020.03L-SP1
Install: E:\lattice 3.12\diamond\3.12\synpbase
OS: Windows 6.2

Hostname: HP-PC

Implementation : Denverton_COMe_CPLD
Synopsys Lattice Technology Pre-mapping, Version map202003lat, Build 172R, Built Nov  2 2020 09:31:45, @


Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 116MB peak: 116MB)

@A: MF827 |No constraint file specified.
@E: BB108 |Could not open file 'E:\work\COMe\C3000\COMe_V06\Denverton_COMe_CPLD\synwork\.cckTransfer' for write: Permission denied 
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Mon May 24 11:28:56 2021

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