Lattice Mapping Report File for Design Module 'COME_CPLD_TOP'



Design Information

Command line:   map -a MachXO2 -p LCMXO2-1200HC -t TQFP100 -s 4 -oc Commercial
     Denverton_COMe_CPLD_Denverton_COMe_CPLD.ngd -o
     Denverton_COMe_CPLD_Denverton_COMe_CPLD_map.ncd -pr
     Denverton_COMe_CPLD_Denverton_COMe_CPLD.prf -mp
     Denverton_COMe_CPLD_Denverton_COMe_CPLD.mrp
     E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf -c 0 -gui -msgset
     E:/work/COMe/C3000/COMe_V06/promote.xml 
Target Vendor:  LATTICE
Target Device:  LCMXO2-1200HCTQFP100
Target Performance:   4
Mapper:  xo2c00,  version:  Diamond (64-bit) 3.12.0.240.2
Mapped on:  05/24/21  11:28:38


Design Summary
   Number of registers:    600 out of  1520 (39%)
      PFU registers:          571 out of  1280 (45%)
      PIO registers:           29 out of   240 (12%)
   Number of SLICEs:       448 out of   640 (70%)
      SLICEs as Logic/ROM:    448 out of   640 (70%)
      SLICEs as RAM:            0 out of   480 (0%)
      SLICEs as Carry:        203 out of   640 (32%)
   Number of LUT4s:        892 out of  1280 (70%)
      Number used as logic LUTs:        486
      Number used as distributed RAM:     0
      Number used as ripple logic:      406
      Number used as shift registers:     0
   Number of PIO sites used: 65 + 4(JTAG) out of 80 (86%)
   Number of block RAMs:  0 out of 7 (0%)
   Number of GSRs:        1 out of 1 (100%)
   EFB used :        No
   JTAG used :       No
   Readback used :   No
   Oscillator used : Yes
   Startup used :    No
   POR :             On
   Bandgap :         On
   Number of Power Controller:  0 out of 1 (0%)
   Number of Dynamic Bank Controller (BCINRD):  0 out of 4 (0%)
   Number of Dynamic Bank Controller (BCLVDSO):  0 out of 1 (0%)
   Number of DCCA:  0 out of 8 (0%)
   Number of DCMA:  0 out of 2 (0%)
   Number of PLLs:  0 out of 1 (0%)
   Number of DQSDLLs:  0 out of 2 (0%)
   Number of CLKDIVC:  0 out of 4 (0%)
   Number of ECLKSYNCA:  0 out of 4 (0%)
   Number of ECLKBRIDGECS:  0 out of 2 (0%)
   Notes:-
      1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of
     distributed RAMs) + 2*(Number of ripple logic)
      2. Number of logic LUT4s does not include count of distributed RAM and
     ripple logic.
   Number of clocks:  2
     Net clk_sys: 304 loads, 304 rising, 0 falling (Driver: OSCH_inst )

     Net LPC_CLK_c: 35 loads, 35 rising, 0 falling (Driver: PIO LPC_CLK )
   Number of Clock Enables:  39
     Net s_base_1ms_pulse: 28 loads, 17 LSLICEs
     Net power_seq_inst1/clk_sys_enable_1: 1 loads, 1 LSLICEs
     Net power_seq_inst1/clk_sys_enable_21: 1 loads, 0 LSLICEs
     Net power_seq_inst1/clk_sys_enable_15: 1 loads, 0 LSLICEs
     Net power_seq_inst1/clk_sys_enable_16: 1 loads, 0 LSLICEs
     Net power_seq_inst1/clk_sys_enable_17: 2 loads, 0 LSLICEs
     Net power_seq_inst1/clk_sys_enable_18: 1 loads, 0 LSLICEs
     Net power_seq_inst1/clk_sys_enable_19: 1 loads, 0 LSLICEs
     Net EMMC_RST_N_c: 1 loads, 1 LSLICEs
     Net power_seq_inst1/i_pmu_slp_s45_n: 1 loads, 1 LSLICEs
     Net power_seq_inst1/clk_sys_enable_22: 1 loads, 0 LSLICEs
     Net power_seq_inst1/clk_sys_enable_44: 1 loads, 1 LSLICEs
     Net power_seq_inst1/clk_sys_enable_43: 5 loads, 5 LSLICEs
     Net power_seq_inst1/clk_sys_enable_45: 1 loads, 0 LSLICEs
     Net s_int_mask1_4__N_75: 3 loads, 3 LSLICEs
     Net s_sw_scratch_7__N_71: 4 loads, 4 LSLICEs
     Net s_lpc_rd_en: 4 loads, 4 LSLICEs
     Net s_wdt_delay_7__N_73: 4 loads, 4 LSLICEs
     Net Wd_Ctrl_Mod_inst1/s_pulse_100ms: 6 loads, 6 LSLICEs
     Net Wd_Ctrl_Mod_inst1/clk_sys_enable_35: 4 loads, 4 LSLICEs
     Net Wd_Ctrl_Mod_inst1/clk_sys_enable_32: 4 loads, 4 LSLICEs
     Net LPC_inst1/LPC_CLK_c_enable_29: 9 loads, 9 LSLICEs
     Net LPC_inst1/cur_state_3: 6 loads, 6 LSLICEs
     Net LPC_inst1/LPC_CLK_c_enable_21: 2 loads, 2 LSLICEs
     Net LPC_inst1/LPC_CLK_c_enable_13: 2 loads, 2 LSLICEs
     Net LPC_inst1/LPC_CLK_c_enable_16: 2 loads, 2 LSLICEs
     Net LPC_inst1/LPC_CLK_c_enable_18: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_2: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_4: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_5: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_6: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_7: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_8: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_9: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_10: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_11: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_12: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_13: 1 loads, 1 LSLICEs
     Net int_Interrupt0/clk_sys_enable_14: 1 loads, 1 LSLICEs
   Number of local set/reset loads for net EMMC_RST_N_c merged into GSR:  530
   Number of LSRs:  2
     Net n2963: 1 loads, 1 LSLICEs
     Net LPC_inst1/lpc_lad_o_3__N_31: 35 loads, 31 LSLICEs
   Number of nets driven by tri-state buffers:  0
   Top 10 highest fanout non-clock nets:
     Net LPC_inst1/lpc_lad_o_3__N_31: 35 loads
     Net n1007: 32 loads
     Net power_seq_inst1/n848: 31 loads
     Net power_seq_inst1/n851: 31 loads
     Net power_seq_inst1/n854: 31 loads
     Net power_seq_inst1/n857: 31 loads
     Net power_seq_inst1/n976: 31 loads
     Net power_seq_inst1/n979: 31 loads
     Net power_seq_inst1/n982: 31 loads

     Net power_seq_inst1/n985: 31 loads




   Number of warnings:  35
   Number of errors:    0
     




Design Errors/Warnings

WARNING - map: E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf(99): Semantic
     error in "IOBUF PORT "EXCD0_CPPE_N" IO_TYPE=LVCMOS33 PULLMODE=NONE ;": Port
     "EXCD0_CPPE_N" does not exist in the design. This preference has been
     disabled.
WARNING - map: E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf(100):
     Semantic error in "IOBUF PORT "EXCD0_PERST_N" IO_TYPE=LVCMOS33
     PULLMODE=NONE ;": Port "EXCD0_PERST_N" does not exist in the design. This
     preference has been disabled.
WARNING - map: E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf(101):
     Semantic error in "IOBUF PORT "EXCD1_CPPE_N" IO_TYPE=LVCMOS33 PULLMODE=NONE
     ;": Port "EXCD1_CPPE_N" does not exist in the design. This preference has
     been disabled.
WARNING - map: E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf(102):
     Semantic error in "IOBUF PORT "EXCD1_PERST_N" IO_TYPE=LVCMOS33
     PULLMODE=NONE ;": Port "EXCD1_PERST_N" does not exist in the design. This
     preference has been disabled.
WARNING - map: E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf(106):
     Semantic error in "IOBUF PORT "I2C_SCL" IO_TYPE=LVCMOS33 PULLMODE=NONE ;":
     Port "I2C_SCL" does not exist in the design. This preference has been
     disabled.
WARNING - map: E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf(129):
     Semantic error in "IOBUF PORT "VCCP_PINALRT" IO_TYPE=LVCMOS33 PULLMODE=NONE
     ;": Port "VCCP_PINALRT" does not exist in the design. This preference has
     been disabled.
WARNING - map: E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf(133):
     Semantic error in "IOBUF PORT "VDDQP_PGOOD" IO_TYPE=LVCMOS33 PULLMODE=NONE
     ;": Port "VDDQP_PGOOD" does not exist in the design. This preference has
     been disabled.
WARNING - map: E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf(134):
     Semantic error in "IOBUF PORT "VDDQP_PINALRT" IO_TYPE=LVCMOS33
     PULLMODE=NONE ;": Port "VDDQP_PINALRT" does not exist in the design. This
     preference has been disabled.
WARNING - map: E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf(138):
     Semantic error in "IOBUF PORT "XP0R6V_PGOOD" IO_TYPE=LVCMOS33 PULLMODE=NONE
     ;": Port "XP0R6V_PGOOD" does not exist in the design. This preference has
     been disabled.
WARNING - map: E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf(151):
     Semantic error in "IOBUF PORT "CPLD_PROCHOT_L" IO_TYPE=LVCMOS33
     PULLMODE=NONE ;": Port "CPLD_PROCHOT_L" does not exist in the design. This
     preference has been disabled.
WARNING - map: E:/work/COMe/C3000/COMe_V06/Denverton_COMe_CPLD.lpf(155):
     Semantic error in "IOBUF PORT "THRM_N" IO_TYPE=LVCMOS33 PULLMODE=NONE ;":
     Port "THRM_N" does not exist in the design. This preference has been
     disabled.

WARNING - map: input pad net 'EXCD0_CPPE_N' has no legal load.
WARNING - map: input pad net 'EXCD0_PERST_N' has no legal load.
WARNING - map: input pad net 'EXCD1_CPPE_N' has no legal load.
WARNING - map: input pad net 'EXCD1_PERST_N' has no legal load.
WARNING - map: input pad net 'I2C_SCL' has no legal load.
WARNING - map: input pad net 'CPLD_PROCHOT_L' has no legal load.
WARNING - map: input pad net 'THRM_N' has no legal load.
WARNING - map: input pad net 'VCCP_PINALRT' has no legal load.
WARNING - map: input pad net 'VDDQP_PINALRT' has no legal load.
WARNING - map: input pad net 'VDDQP_PGOOD' has no legal load.
WARNING - map: input pad net 'XP0R6V_PGOOD' has no legal load.
WARNING - map: Using local reset signal 'EMMC_RST_N_c' to infer global GSR net.
WARNING - map: Output register power_seq_inst1/o_xp0r6v_en_521$r0 is replicated
     for XP0R6V_EN_pad.
WARNING - map: IO buffer missing for top level port EXCD0_CPPE_N...logic will be
     discarded.
WARNING - map: IO buffer missing for top level port EXCD0_PERST_N...logic will
     be discarded.
WARNING - map: IO buffer missing for top level port EXCD1_CPPE_N...logic will be
     discarded.
WARNING - map: IO buffer missing for top level port EXCD1_PERST_N...logic will
     be discarded.
WARNING - map: IO buffer missing for top level port I2C_SCL...logic will be
     discarded.
WARNING - map: IO buffer missing for top level port CPLD_PROCHOT_L...logic will
     be discarded.
WARNING - map: IO buffer missing for top level port THRM_N...logic will be
     discarded.
WARNING - map: IO buffer missing for top level port VCCP_PINALRT...logic will be
     discarded.
WARNING - map: IO buffer missing for top level port VDDQP_PINALRT...logic will
     be discarded.
WARNING - map: IO buffer missing for top level port VDDQP_PGOOD...logic will be
     discarded.
WARNING - map: IO buffer missing for top level port XP0R6V_PGOOD...logic will be
     discarded.



IO (PIO) Attributes

+---------------------+-----------+-----------+------------+
| IO Name             | Direction | Levelmode | IO         |
|                     |           |  IO_TYPE  | Register   |
+---------------------+-----------+-----------+------------+
| LPC_CLKRUN_N        | OUTPUT    | PCI33     |            |
+---------------------+-----------+-----------+------------+
| I2C_SDA             | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| SPI_CS_N            | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| BIOS_SPI_CS1        | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| BIOS_SPI_CS0        | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| LPC_AD[0]           | BIDIR     | PCI33     | IN/OUT     |
+---------------------+-----------+-----------+------------+

| LPC_AD[1]           | BIDIR     | PCI33     | IN/OUT     |
+---------------------+-----------+-----------+------------+
| LPC_AD[2]           | BIDIR     | PCI33     | IN/OUT     |
+---------------------+-----------+-----------+------------+
| LPC_SERIRQ          | OUTPUT    | PCI33     |            |
+---------------------+-----------+-----------+------------+
| LPC_AD[3]           | BIDIR     | PCI33     | IN/OUT     |
+---------------------+-----------+-----------+------------+
| CPLD_MEMHOT_N       | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| CPLD_PROCHOT_N      | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| CB_RESET_N          | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| PMU_SUSCLK_CPLD     | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| PWRBTN_N            | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| RST_RSMRST_N        | OUTPUT    | LVCMOS33  | OUT        |
+---------------------+-----------+-----------+------------+
| SUS_STAT_N          | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| SYS_RST_N           | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| CPLD_COREPWROK      | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| GPIO45              | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| FAULT1_VCCP         | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| FAULT1_VDDQP        | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| FLEX_CLK_SE_0       | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| FM_SOC_CATERR_N     | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| FM_SOC_FPGA_MCERR_N | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| SATA0_LED_N         | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| SLEEP_CPLD_N        | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| SOC_ERR0_N          | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| SOC_ERR1_N          | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| SOC_ERR2_N          | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| VCCP_EN             | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| VCCRAMP_EN          | OUTPUT    | LVCMOS33  | OUT        |
+---------------------+-----------+-----------+------------+
| VDDQP_EN            | OUTPUT    | LVCMOS33  | OUT        |
+---------------------+-----------+-----------+------------+
| VNNP_EN             | OUTPUT    | LVCMOS33  | OUT        |
+---------------------+-----------+-----------+------------+

| XP0R6V_EN           | OUTPUT    | LVCMOS33  | OUT        |
+---------------------+-----------+-----------+------------+
| XP1R05V_EN          | OUTPUT    | LVCMOS33  | OUT        |
+---------------------+-----------+-----------+------------+
| XP1R24V_EN          | OUTPUT    | LVCMOS33  | OUT        |
+---------------------+-----------+-----------+------------+
| XP1R8V_EN           | OUTPUT    | LVCMOS33  | OUT        |
+---------------------+-----------+-----------+------------+
| XP2R5V_EN           | OUTPUT    | LVCMOS33  | OUT        |
+---------------------+-----------+-----------+------------+
| EMMC_RST_N          | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| WDT_CON             | OUTPUT    | LVCMOS33  | OUT        |
+---------------------+-----------+-----------+------------+
| BIOS_DIS0_N         | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| BIOS_DIS1_N         | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| SPI_CS0             | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| SPI_CS1             | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| LPC_CLK             | INPUT     | PCI33     |            |
+---------------------+-----------+-----------+------------+
| LPC_FRAME_N         | INPUT     | PCI33     |            |
+---------------------+-----------+-----------+------------+
| CPLD_MEMHOT_L       | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| IRQ_DIMM_EVENT_L    | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| THERMTRIP_N_CON     | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| VRHOT               | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| PMU_PLTRST          | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| PMU_SLP_S3_N        | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| PMU_SLP_S45_N       | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| PWR_OK              | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| GPIO38              | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| GPIO70              | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| VCCP_PGOOD          | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| VCCRAMP_PGOOD       | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| VNNP_PGOOD          | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| XP1R05V_PGOOD       | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| XP1R24V_PGOOD       | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+

| XP1R8V_PGOOD        | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| XP2R5V_PGOOD        | INPUT     | LVCMOS33  | IN         |
+---------------------+-----------+-----------+------------+
| XP3R3V_PGOOD        | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+



Removed logic

Signal i_rst_N_228 was merged into signal EMMC_RST_N_c
Signal n2183 was merged into signal lpc_lad_oe
Signal VCC_net undriven or does not drive anything - clipped.
Signal Wd_Ctrl_Mod_inst1/add_21_1/S0 undriven or does not drive anything -
     clipped.
Signal Wd_Ctrl_Mod_inst1/add_21_1/CI undriven or does not drive anything -
     clipped.
Signal Wd_Ctrl_Mod_inst1/add_21_7/S1 undriven or does not drive anything -
     clipped.
Signal Wd_Ctrl_Mod_inst1/add_21_7/CO undriven or does not drive anything -
     clipped.
Signal Wd_Ctrl_Mod_inst1/add_44_1/S0 undriven or does not drive anything -
     clipped.
Signal Wd_Ctrl_Mod_inst1/add_44_1/CI undriven or does not drive anything -
     clipped.
Signal Wd_Ctrl_Mod_inst1/add_44_9/S1 undriven or does not drive anything -
     clipped.
Signal Wd_Ctrl_Mod_inst1/add_44_9/CO undriven or does not drive anything -
     clipped.
Signal Wd_Ctrl_Mod_inst1/s_cnt_100ms_877_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal Wd_Ctrl_Mod_inst1/s_cnt_100ms_877_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal Wd_Ctrl_Mod_inst1/s_cnt_100ms_877_add_4_7/CO undriven or does not drive
     anything - clipped.
Signal Wd_Ctrl_Mod_inst1/s_loss_count_878_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal Wd_Ctrl_Mod_inst1/s_loss_count_878_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal Wd_Ctrl_Mod_inst1/s_loss_count_878_add_4_11/CO undriven or does not drive
     anything - clipped.
Signal internal_por_cnt_854_add_4_1/S0 undriven or does not drive anything -
     clipped.
Signal internal_por_cnt_854_add_4_1/CI undriven or does not drive anything -
     clipped.
Signal internal_por_cnt_854_add_4_7/S1 undriven or does not drive anything -
     clipped.
Signal internal_por_cnt_854_add_4_7/CO undriven or does not drive anything -
     clipped.
Signal power_seq_inst1/VCC_EN_CNT_858_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VCC_EN_CNT_858_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VCC_EN_CNT_858_add_4_33/S1 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VCC_EN_CNT_858_add_4_33/CO undriven or does not drive

     anything - clipped.
Signal power_seq_inst1/VCCRAM_CNT_860_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VCCRAM_CNT_860_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VCCRAM_CNT_860_add_4_33/S1 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VCCRAM_CNT_860_add_4_33/CO undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VCCREF_CNT_862_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VCCREF_CNT_862_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VCCREF_CNT_862_add_4_33/S1 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VCCREF_CNT_862_add_4_33/CO undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VDDQ_N_CNT_864_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VDDQ_N_CNT_864_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VDDQ_N_CNT_864_add_4_33/S1 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VDDQ_N_CNT_864_add_4_33/CO undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/power_ok_CNT_856_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/power_ok_CNT_856_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/power_ok_CNT_856_add_4_33/S1 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/power_ok_CNT_856_add_4_33/CO undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/RSMRST_N_CNT_866_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/RSMRST_N_CNT_866_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/RSMRST_N_CNT_866_add_4_33/S1 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/RSMRST_N_CNT_866_add_4_33/CO undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/V1P05_CNT_868_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/V1P05_CNT_868_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/V1P05_CNT_868_add_4_33/S1 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/V1P05_CNT_868_add_4_33/CO undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VNN_CNT_870_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VNN_CNT_870_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VNN_CNT_870_add_4_33/S1 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/VNN_CNT_870_add_4_33/CO undriven or does not drive

     anything - clipped.
Signal power_seq_inst1/V1P80_CNT_872_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/V1P80_CNT_872_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/V1P80_CNT_872_add_4_33/S1 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/V1P80_CNT_872_add_4_33/CO undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/S_count_base1_873_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/S_count_base1_873_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/S_count_base1_873_add_4_9/CO undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/seq_power_cnt_875_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/seq_power_cnt_875_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/seq_power_cnt_875_add_4_33/S1 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/seq_power_cnt_875_add_4_33/CO undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/S_count_base0_876_add_4_1/S0 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/S_count_base0_876_add_4_1/CI undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/S_count_base0_876_add_4_9/S1 undriven or does not drive
     anything - clipped.
Signal power_seq_inst1/S_count_base0_876_add_4_9/CO undriven or does not drive
     anything - clipped.
Block int_Interrupt0/i_rst_I_0_1_lut was optimized away.
Block i1676_1_lut was optimized away.
Block i2 was optimized away.

     

OSC Summary
-----------

OSC 1:                                     Pin/Node Value
  OSC Instance Name:                                OSCH_inst
  OSC Type:                                         OSCH
  STDBY Input:                                      NONE
  OSC Output:                              NODE     clk_sys
  OSC Nominal Frequency (MHz):                      66.50



ASIC Components
---------------

Instance Name: OSCH_inst
         Type: OSCH







GSR Usage
---------

GSR Component:
   The local reset signal 'EMMC_RST_N_c' of the design has been inferred as
        Global Set Reset (GSR). The reset signal used for GSR control is
        'EMMC_RST_N_c'.
        

     GSR Property:
   The design components with GSR property set to ENABLED will respond to global
        set reset while the components with GSR property set to DISABLED will
        not.
        

     Components not on inferred reset domain but have GSR property enabled
---------------------------------------------------------------------

     These components have the GSR property set to ENABLED and are not on the
     inferred reset domain. The components will respond to the unrelated reset
     signal 'EMMC_RST_N_c' via the GSR component.

     Type and number of components of the type: 
   Register = 1 

     Type and instance name of component: 
   Register : power_seq_inst1/o_xp0r6v_en_521$r0

     Components on inferred reset domain with GSR Property disabled
--------------------------------------------------------------

     These components have the GSR property set to DISABLED and are on the
     inferred reset domain. The components will respond to the reset signal
     'EMMC_RST_N_c' via the local reset on the component and not the GSR
     component.

     Type and number of components of the type: 
   Register = 1 

     Type and instance name of component: 
   Register : power_seq_inst1/i_pmu_slp_s45_n_488



Run Time and Memory Usage
-------------------------

   Total CPU Time: 1 secs  
   Total REAL Time: 0 secs  
   Peak Memory Usage: 48 MB
        












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     Copyright (c) 1995 AT&T Corp.   All rights reserved.
     Copyright (c) 1995-2001 Lucent Technologies Inc.  All rights reserved.
     Copyright (c) 2001 Agere Systems   All rights reserved.
     Copyright (c) 2002-2020 Lattice Semiconductor Corporation,  All rights
     reserved.