proj_1 (impl1)
Synthesis -
Compiler Report
Compiler Constraint Applicator
Pre-mapping Report
Clock Summary
Clock Conversion
Mapper Report
Timing Report
Performance Summary
Clock Relationships
Interface Information
Detailed Report for Clocks
Clock: Belgite_BOARD_CPLD|COME_CPLD_LPC_CLK
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: Belgite_BOARD_CPLD|clk_sys_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Resource Utilization
Constraint Checker Report (18:57 06-Dec)
Place and Route -
Timing Report (18:51 06-Dec)
Session Log (18:57 06-Dec)