PAR: Place And Route Diamond (64-bit) 3.12.0.240.2.
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp. All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
Copyright (c) 2001 Agere Systems All rights reserved.
Copyright (c) 2002-2020 Lattice Semiconductor Corporation, All rights reserved.
Wed Dec 08 15:54:03 2021
E:/lattice 3.12/diamond/3.12/ispfpga\bin\nt64\par -f M0_CPLD_V25_impl1.p2t
M0_CPLD_V25_impl1_map.ncd M0_CPLD_V25_impl1.dir M0_CPLD_V25_impl1.prf -gui
-msgset E:/work/CPLD_Program/M0/DVT_pro/M0_CPLD_V25_aa/promote.xml
Preference file: M0_CPLD_V25_impl1.prf.
Cost Table Summary
Level/ Number Worst Timing Worst Timing Run NCD
Cost [ncd] Unrouted Slack Score Slack(hold) Score(hold) Time Status
---------- -------- ----- ------ ----------- ----------- ---- ------
5_1 * 0 1.772 0 0.302 0 57 Completed
* : Design saved.
Total (real) run time for 1-seed: 58 secs
par done!
Note: user must run 'Trace' for timing closure signoff.
Lattice Place and Route Report for Design "M0_CPLD_V25_impl1_map.ncd"
Wed Dec 08 15:54:03 2021
Best Par Run
PAR: Place And Route Diamond (64-bit) 3.12.0.240.2.
Command Line: par -w -l 5 -i 6 -t 1 -c 0 -e 0 -gui -msgset E:/work/CPLD_Program/M0/DVT_pro/M0_CPLD_V25_aa/promote.xml -exp parUseNBR=1:parCDP=0:parCDR=0:parPathBased=OFF:parASE=1 M0_CPLD_V25_impl1_map.ncd M0_CPLD_V25_impl1.dir/5_1.ncd M0_CPLD_V25_impl1.prf
Preference file: M0_CPLD_V25_impl1.prf.
Placement level-cost: 5-1.
Routing Iterations: 6
Loading design for application par from file M0_CPLD_V25_impl1_map.ncd.
Design name: Belgite_BOARD_CPLD
NCD version: 3.3
Vendor: LATTICE
Device: LCMXO2-2000HC
Package: FTBGA256
Performance: 4
Loading device for application par from file 'xo2c2000.nph' in environment: E:/lattice 3.12/diamond/3.12/ispfpga.
Package Status: Final Version 1.44.
Performance Hardware Data Status: Final Version 34.4.
License checked out.
Ignore Preference Error(s): True
Device utilization summary:
PIO (prelim) 148+4(JTAG)/216 70% used
148+4(JTAG)/207 73% bonded
IOLOGIC 30/216 13% used
SLICE 1050/1056 99% used
GSR 1/1 100% used
OSC 1/1 100% used
Number of Signals: 2997
Number of Connections: 8806
WARNING - par: When using the Master SPI interface for configuration, it is recommended that the PROGRAMN, DONE and INITN pins be used. Refer to the MachXO2 Handbook for information on these three ports.
Pin Constraint Summary:
148 out of 148 pins locked (100% locked).
The following 2 signals are selected to use the primary clock routing resources:
clk_sys (driver: OSCH_inst, clk load #: 553)
COME_CPLD_LPC_CLK_c (driver: COME_CPLD_LPC_CLK, clk load #: 29)
The following 3 signals are selected to use the secondary clock routing resources:
N_3283_0 (driver: LPC_IO_Cycle_Inst/SLICE_986, clk load #: 0, sr load #: 144, ce load #: 0)
u_watchdog/i_rstn_i (driver: SLICE_315, clk load #: 0, sr load #: 47, ce load #: 0)
clk_1ms (driver: SLICE_288, clk load #: 0, sr load #: 0, ce load #: 45)
Signal power_on_rst is selected as Global Set/Reset.
Starting Placer Phase 0.
.........
Finished Placer Phase 0. REAL time: 8 secs
Starting Placer Phase 1.
......................
Placer score = 610514.
Finished Placer Phase 1. REAL time: 35 secs
Starting Placer Phase 2.
.
Placer score = 606598
Finished Placer Phase 2. REAL time: 36 secs
Clock Report
Global Clock Resources:
CLK_PIN : 1 out of 8 (12%)
PLL : 0 out of 1 (0%)
DCM : 0 out of 2 (0%)
DCC : 0 out of 8 (0%)
Global Clocks:
PRIMARY "clk_sys" from OSC on comp "OSCH_inst" on site "OSC", clk load = 553
PRIMARY "COME_CPLD_LPC_CLK_c" from comp "COME_CPLD_LPC_CLK" on CLK_PIN site "C8 (PT17A)", clk load = 29
SECONDARY "N_3283_0" from F1 on comp "LPC_IO_Cycle_Inst/SLICE_986" on site "R9C13B", clk load = 0, ce load = 0, sr load = 144
SECONDARY "u_watchdog/i_rstn_i" from F1 on comp "SLICE_315" on site "R9C13A", clk load = 0, ce load = 0, sr load = 47
SECONDARY "clk_1ms" from Q0 on comp "SLICE_288" on site "R10C25C", clk load = 0, ce load = 45, sr load = 0
PRIMARY : 2 out of 8 (25%)
SECONDARY: 3 out of 8 (37%)
Edge Clocks:
No edge clock selected.
I/O Usage Summary (final):
148 + 4(JTAG) out of 216 (70.4%) PIO sites used.
148 + 4(JTAG) out of 207 (73.4%) bonded PIO sites used.
Number of PIO comps: 148; differential: 0.
Number of Vref pins used: 0.
I/O Bank Usage Summary:
+----------+----------------+------------+-----------+
| I/O Bank | Usage | Bank Vccio | Bank Vref |
+----------+----------------+------------+-----------+
| 0 | 29 / 51 ( 56%) | 3.3V | - |
| 1 | 35 / 52 ( 67%) | 3.3V | - |
| 2 | 39 / 52 ( 75%) | 3.3V | - |
| 3 | 11 / 16 ( 68%) | 3.3V | - |
| 4 | 15 / 16 ( 93%) | 3.3V | - |
| 5 | 19 / 20 ( 95%) | 3.3V | - |
+----------+----------------+------------+-----------+
Total placer CPU time: 34 secs
Dumping design to file M0_CPLD_V25_impl1.dir/5_1.ncd.
0 connections routed; 8806 unrouted.
Starting router resource preassignment
Completed router resource preassignment. Real time: 39 secs
Start NBR router at 15:54:42 12/08/21
*****************************************************************
Info: NBR allows conflicts(one node used by more than one signal)
in the earlier iterations. In each iteration, it tries to
solve the conflicts while keeping the critical connections
routed as short as possible. The routing process is said to
be completed when no conflicts exist and all connections
are routed.
Note: NBR uses a different method to calculate timing slacks. The
worst slack and total negative slack may not be the same as
that in TRCE report. You should always run TRCE to verify
your design.
*****************************************************************
Start NBR special constraint process at 15:54:43 12/08/21
Start NBR section for initial routing at 15:54:43 12/08/21
Level 1, iteration 1
3(0.00%) conflicts; 6979(79.25%) untouched conns; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.066ns/0.000ns; real time: 42 secs
Level 2, iteration 1
4(0.00%) conflicts; 6945(78.87%) untouched conns; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.373ns/0.000ns; real time: 43 secs
Level 3, iteration 1
7(0.01%) conflicts; 6364(72.27%) untouched conns; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.837ns/0.000ns; real time: 44 secs
Level 4, iteration 1
205(0.16%) conflicts; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 47 secs
Info: Initial congestion level at 75% usage is 0
Info: Initial congestion area at 75% usage is 5 (1.54%)
Start NBR section for normal routing at 15:54:50 12/08/21
Level 1, iteration 1
1(0.00%) conflict; 419(4.76%) untouched conns; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 47 secs
Level 2, iteration 1
0(0.00%) conflict; 419(4.76%) untouched conns; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 47 secs
Level 3, iteration 1
4(0.00%) conflicts; 415(4.71%) untouched conns; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 47 secs
Level 4, iteration 1
136(0.10%) conflicts; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 48 secs
Level 4, iteration 2
45(0.03%) conflicts; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 49 secs
Level 4, iteration 3
15(0.01%) conflicts; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 49 secs
Level 4, iteration 4
5(0.00%) conflicts; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 49 secs
Level 4, iteration 5
1(0.00%) conflict; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 49 secs
Level 4, iteration 6
1(0.00%) conflict; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 49 secs
Level 4, iteration 7
1(0.00%) conflict; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 49 secs
Level 4, iteration 8
0(0.00%) conflict; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 49 secs
Start NBR section for setup/hold timing optimization with effort level 3 at 15:54:52 12/08/21
Start NBR section for re-routing at 15:54:54 12/08/21
Level 4, iteration 1
0(0.00%) conflict; 0(0.00%) untouched conn; 0 (nbr) score;
Estimated worst slack/total negative slack<setup>: 1.772ns/0.000ns; real time: 51 secs
Start NBR section for post-routing at 15:54:54 12/08/21
End NBR router with 0 unrouted connection
NBR Summary
-----------
Number of unrouted connections : 0 (0.00%)
Number of connections with timing violations : 0 (0.00%)
Estimated worst slack<setup> : 1.772ns
Timing score<setup> : 0
-----------
Notes: The timing info is calculated for SETUP only and all PAR_ADJs are ignored.
Total CPU time 52 secs
Total REAL time: 56 secs
Completely routed.
End of route. 8806 routed (100.00%); 0 unrouted.
Hold time timing score: 0, hold timing errors: 0
Timing score: 0
Dumping design to file M0_CPLD_V25_impl1.dir/5_1.ncd.
All signals are completely routed.
PAR_SUMMARY::Run status = Completed
PAR_SUMMARY::Number of unrouted conns = 0
PAR_SUMMARY::Worst slack<setup/<ns>> = 1.772
PAR_SUMMARY::Timing score<setup/<ns>> = 0.000
PAR_SUMMARY::Worst slack<hold /<ns>> = 0.302
PAR_SUMMARY::Timing score<hold /<ns>> = 0.000
PAR_SUMMARY::Number of errors = 0
Total CPU time to completion: 53 secs
Total REAL time to completion: 58 secs
par done!
Note: user must run 'Trace' for timing closure signoff.
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp. All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
Copyright (c) 2001 Agere Systems All rights reserved.
Copyright (c) 2002-2020 Lattice Semiconductor Corporation, All rights reserved.